Question 1

A voltage gain of 20 dB represents a voltage gain of 10.

Accepted Answer

A) True 
 B)False

Question 2

When each amplifier stage in a two- stage amplifier has equal dominant upper critical frequencies, the overall dominant frequency is equal to

Accepted Answer

A) less than the dominant frequency of one stage 
B) the dominant frequency of one stage 
C) twice the dominant frequency of one stage 
D) none of the above 
A) less than the dominant frequency of one stage 
B) the dominant frequency of one stage 
C) twice the dominant frequency of one stage 
D) none of the above

Question 3

Figure 1 Assume rS1U1B1eS1U1B0' = 15 ▲.
-Refer to Figure 1. The cutoff frequency due to C1 is

Accepted Answer

A) 23 Hz 
B) 13 Hz 
C) 40 Hz 
D) 7.2 Hz 
A) 23 Hz 
B) 13 Hz 
C) 40 Hz 
D) 7.2 Hz

Question 4

Figure 1 Assume rS1U1B1eS1U1B0' = 15 ▲.
-Refer to Figure 1. Rin is approximately

Accepted Answer

A) 10 k▲ 
B) 5.7 k▲ 
C) 3.2 k▲ 
D) 1.8 k▲ 
A) 10 k▲ 
B) 5.7 k▲ 
C) 3.2 k▲ 
D) 1.8 k▲

Question 5

Figure 5. The sec/div control is set to 0.05 µS/div.
-Refer to Figure 5. From the information given, the fcu is approximately

Accepted Answer

A) 7.0 MHz 
B) 4.7 MHz 
C) 13.4 MHz 
D) 20 MHz 
A) 7.0 MHz 
B) 4.7 MHz 
C) 13.4 MHz 
D) 20 MHz

Question 6

The high- frequency response of a circuit can be measured by

Accepted Answer

A) raising the frequency until the midrange amplitude drops to 70.7% 
B) measuring the rise time of a fast pulse 
C) both A and B 
D) none of the above 
A) raising the frequency until the midrange amplitude drops to 70.7% 
B) measuring the rise time of a fast pulse 
C) both A and B 
D) none of the above

Question 7

The phase shift at the upper cutoff frequency of an amplifier is 90°.

Accepted Answer

A) True 
 B)False

Question 8

Figure 1 Assume rS1U1B1eS1U1B0' = 15 ▲.
-Refer to Figure 1. What value of RL will produce a cutoff frequency due to C3 of 25 Hz?

Accepted Answer

A) 19 k▲ 
B) 8.8 k▲ 
C) 24 k▲ 
D) 14 k▲ 
A) 19 k▲ 
B) 8.8 k▲ 
C) 24 k▲ 
D) 14 k▲

Question 9

Figure 1 Assume rS1U1B1eS1U1B0' = 15 ▲.
-Refer to Figure 1. Assume that Cbc = 6 pF and RL= 27 k▲. The Miller input capacitance due to Cbc is

Accepted Answer

A) 168 pF 
B) 7.0 pF 
C) 216 pF 
D) 49 pF 
A) 168 pF 
B) 7.0 pF 
C) 216 pF 
D) 49 pF

Question 10

The input coupling capacitor is generally smaller on a CS amplifier than its equivalent BJT counterpart because

Accepted Answer

A) Rin is higher, compensating for the smaller C 
B) the FET is a voltage- controlled device, so the extra charge is not needed 
C) the input signal voltage is generally smaller 
D) the frequency response is more important in BJTs than FETs 
A) Rin is higher, compensating for the smaller C 
B) the FET is a voltage- controlled device, so the extra charge is not needed 
C) the input signal voltage is generally smaller 
D) the frequency response is more important in BJTs than FETs

Question 11

The input coupling capacitor affects the low- frequency response.

Accepted Answer

A) True 
 B)False

Question 12

A Bode plot is a graph of decibel voltage gain as a function of phase angle.

Accepted Answer

A) True 
 B)False

Question 13

Figure 2 IS1U1B1GSS S1U1B0(max)= 100 pA. VS1U1B1GS S1U1B0= -2.4 V
-Refer to Figure 2. The value of C1 that has a lower cutoff frequency of approximately 20 Hz is

Accepted Answer

A) 0.10 µF 
B) 10 nF 
C) 1 nF 
D) 1.0 µF 
A) 0.10 µF 
B) 10 nF 
C) 1 nF 
D) 1.0 µF

A voltage gain of 20 dB represents a voltage gain of 10.

When each amplifier stage in a two- stage amplifier has equal dominant upper critical frequencies, the overall dominant frequency is equal to

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. The cutoff frequency due to C1 is

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. Rin is approximately

Figure 5. The sec/div control is set to 0.05 µS/div. -Refer to Figure 5. From the information given, the fcu is approximately

The high- frequency response of a circuit can be measured by

The phase shift at the upper cutoff frequency of an amplifier is 90°.

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. What value of RL will produce a cutoff frequency due to C3 of 25 Hz?

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. Assume that Cbc = 6 pF and RL= 27 k▲. The Miller input capacitance due to Cbc is

The input coupling capacitor is generally smaller on a CS amplifier than its equivalent BJT counterpart because

The input coupling capacitor affects the low- frequency response.

A Bode plot is a graph of decibel voltage gain as a function of phase angle.

Figure 2 I_GSS(max)= 100 pA. V_GS= -2.4 V -Refer to Figure 2. The value of C1 that has a lower cutoff frequency of approximately 20 Hz is

Introduction to Semiconductors

Diodes and Applications

Special-Purpose Diodes

Bipolar Junction Transistors

Transistor Bias Circuits

BJT Amplifiers

BJT Power Amplifiers

Field-Effect Transistors Fets

Fet Amplifiers and Switching Circuits

Thyristors

The Operational Amplifier

Basic Op-Amp Circuits

Special-Purpose Integrated Circuits

Active Filters

Oscillators

Voltage Regulators

Communication Devices and Methods

Filters

Exam 10: Amplifier Frequency Response

A voltage gain of 20 dB represents a voltage gain of 10.

When each amplifier stage in a two- stage amplifier has equal dominant upper critical frequencies, the overall dominant frequency is equal to

Figure 1 Assume re' = 15 ▲. -Refer to Figure 1. The cutoff frequency due to C1 is

Figure 1 Assume re' = 15 ▲. -Refer to Figure 1. Rin is approximately

Figure 5. The sec/div control is set to 0.05 µS/div. -Refer to Figure 5. From the information given, the fcu is approximately

The high- frequency response of a circuit can be measured by

The phase shift at the upper cutoff frequency of an amplifier is 90°.

Figure 1 Assume re' = 15 ▲. -Refer to Figure 1. What value of RL will produce a cutoff frequency due to C3 of 25 Hz?

Figure 1 Assume re' = 15 ▲. -Refer to Figure 1. Assume that Cbc = 6 pF and RL= 27 k▲. The Miller input capacitance due to Cbc is

The input coupling capacitor is generally smaller on a CS amplifier than its equivalent BJT counterpart because

The input coupling capacitor affects the low- frequency response.

A Bode plot is a graph of decibel voltage gain as a function of phase angle.

Figure 2 IGSS (max)= 100 pA. VGS = -2.4 V -Refer to Figure 2. The value of C1 that has a lower cutoff frequency of approximately 20 Hz is

Introduction to Semiconductors

Diodes and Applications

Special-Purpose Diodes

Bipolar Junction Transistors

Transistor Bias Circuits

BJT Amplifiers

BJT Power Amplifiers

Field-Effect Transistors Fets

Fet Amplifiers and Switching Circuits

Thyristors

The Operational Amplifier

Basic Op-Amp Circuits

Special-Purpose Integrated Circuits

Active Filters

Oscillators

Voltage Regulators

Communication Devices and Methods

Filters

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. The cutoff frequency due to C1 is

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. Rin is approximately

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. What value of RL will produce a cutoff frequency due to C3 of 25 Hz?

Figure 1 Assume r_e' = 15 ▲. -Refer to Figure 1. Assume that Cbc = 6 pF and RL= 27 k▲. The Miller input capacitance due to Cbc is

Figure 2 I_GSS(max)= 100 pA. V_GS= -2.4 V -Refer to Figure 2. The value of C1 that has a lower cutoff frequency of approximately 20 Hz is