Exam 8: Field-Effect Transistors Fets

Figure 2 Assume the curve in (b)represents the transistor in (a). -Refer to Figure 2. A source resistor, RS, that will provide approximately ID = 4 mA is

Assume an n- channel JFET has a VGS(off)of -8 V. If VGS = -4 V, ID will be

Figure 2 Assume the curve in (b)represents the transistor in (a). -Refer to Figure 2. Assume that the source terminal is grounded. For this transistor, the drain voltage, VD, will be approximately

Figure 5 The equations for K and I_D are given in part (c). -Refer to Figure 5. The transistor shown is a

Figure 3 Assume I_DSS = 3.5 mA and V_GS(off)= -2 V. -If a JFET bias circuit is designed with current- source biasing,

Figure 1 -Refer to Figure 1. The pinch- off voltage, Vp, is

Figure 4 -Refer to Figure 4. The transistor is biased for

Assume a transistor has an IDSS of 3.0 mA and a gm0 of 2500 µS. The gate- source cutoff voltage, ^VGS(off)^{, is}

Figure 5 The equations for K and I_D are given in part (c). -Refer to Figure 5. ID is approximately

An n- channel E- MOSFET

Figure 1 -Refer to Figure 1, which represents two curves for a JFET. At ID = 6 mA, the transconductance, gm, is approximately

The input structure of a MOSFET is a reverse- biased diode.

Figure 3 Assume I_DSS = 3.5 mA and V_GS(off)= -2 V. -Refer to Figure 3. If RS were shorted to ground, the current, ID, is

Figure 5 The equations for K and I_D are given in part (c). -Refer to Figure 5. VGS is

Figure 2 Assume the curve in (b)represents the transistor in (a). -Refer to Figure 2. If VS = 1.3 V, then VGS is

Figure 3 Assume I_DSS = 3.5 mA and V_GS(off)= -2 V. -Refer to Figure 3. An advantage to the voltage divider bias over self- bias is that voltage- divider bias

A FET that has no channel until one is induced electrically is

Figure 1 -Refer to Figure 1. The curve on the left is called the

An advantage of a JFET over a BJT is that the JFET has

Figure 2 Assume the curve in (b)represents the transistor in (a). -Refer to Figure 2. IDSS is approximately