Question 1

Tri- state devices with input and output enable controls simplify interfacing tasks by allowing the user to:

Accepted Answer

A)  connect only inputs from different devices to the same bus. 
B)  connect a mix of both inputs and outputs from different devices to the same bus. 
C)  connect only outputs from different devices to the same bus. 
A)  connect only inputs from different devices to the same bus. 
B)  connect a mix of both inputs and outputs from different devices to the same bus. 
C)  connect only outputs from different devices to the same bus. B

Question 2

The term "pin compatible" means:

Accepted Answer

A)  pin configurations are the same. 
B)  the pins fit together. 
C)  logic functions performed are the same. 
D)  all pins are the same size. 
A)  pin configurations are the same. 
B)  the pins fit together. 
C)  logic functions performed are the same. 
D)  all pins are the same size. A

Question 3

A logic device has the following specifications: VOL(max) = 0.5 V, VIL(max) = 0.9 V, VOH(min) =2.6V,and VIH(min)=2.1V.Determine the Low-state dc noise margin for the device .

Accepted Answer

A)  0.9 V 
B)  0.5 V 
C)  2.1V 
D)  0.4 V 
A)  0.9 V 
B)  0.5 V 
C)  2.1V 
D)  0.4 V D

Question 4

Generally, an increase in load capacitance to a MOS logic output results in:

Accepted Answer

A)  an increase in switching time. 
B)  a decrease in fan- out capability. 
C)  a decrease in switching time. 
D)  Both A and B 
A)  an increase in switching time. 
B)  a decrease in fan- out capability. 
C)  a decrease in switching time. 
D)  Both A and B

Question 5

If not connected to a ground or logic high signal, TTL inputs:

Accepted Answer

A)  are considered logic high. 
B)  are logic low. 
C)  automatically go to Hi- Z mode. 
D)  are invalid. 
A)  are considered logic high. 
B)  are logic low. 
C)  automatically go to Hi- Z mode. 
D)  are invalid.

Question 6

An IC logic gate draws 1.8 mA when its output is HIGH and 3.8 mA when its output is LOW. Assume a 50% duty cycle and calculate the average Icc current drain.

Accepted Answer

A)  3.8 mA 
B)  2.8 mA 
C)  2.0 mA 
D)  1.8 mA 
A)  3.8 mA 
B)  2.8 mA 
C)  2.0 mA 
D)  1.8 mA

Question 7

The IC chip parameter that describes the output current generated in the logical "O" state under specified load conditions is:

Accepted Answer

A)  IIL  
B)  IIH  
C)  IOH  
D)  IOL 
A)  IIL  
B)  IIH  
C)  IOH  
D)  IOL

Question 8

If a situation calls for a TTL circuit to drive a CMOS circuit, you should:

Accepted Answer

A)  do nothing special. A TTL should be able to drive CMOS IC without any problems. 
B)  ensure that the electrical parameters for both ICs are compatible. 
C)  ensure that the two ICs are pin compatible with each other. 
D)  ensure that both chips have the same fan out. 
A)  do nothing special. A TTL should be able to drive CMOS IC without any problems. 
B)  ensure that the electrical parameters for both ICs are compatible. 
C)  ensure that the two ICs are pin compatible with each other. 
D)  ensure that both chips have the same fan out.

Question 9

3.3 V devices should never be subjected to 5.0 V.

Accepted Answer

A) True 
 B)False

Question 10

The measure of a logic circuit's ability to withstand random noise on its inputs without causing spurious changes in the output voltage is called:

Accepted Answer

A)  speed- power product. 
B)  noise immunity. 
C)  fan- out. 
D)  Both A and C 
A)  speed- power product. 
B)  noise immunity. 
C)  fan- out. 
D)  Both A and C

Question 11

The highest speed version for the Cyclone II chip is the dash ______.

Accepted Answer

A)  six 
B)  seven 
C)  five 
D)  eight 
A)  six 
B)  seven 
C)  five 
D)  eight

Question 12

In the high- impedance state, tri- state devices:

Accepted Answer

A)  allow input data to pass through the device. 
B)  have their enables electrically isolated from other circuits. 
C)  have their outputs electrically isolated from other circuits. 
D)  have their inputs electrically isolated from other circuits. 
A)  allow input data to pass through the device. 
B)  have their enables electrically isolated from other circuits. 
C)  have their outputs electrically isolated from other circuits. 
D)  have their inputs electrically isolated from other circuits.

Question 13

Integrated circuits typically dissipate less power than their discrete component counterparts.

Accepted Answer

A) True 
 B)False

Question 14

If a logic pulser indicates a constant low at a particular node:

Accepted Answer

A)  the node is grounded. 
B)  the node is pulsing. 
C)  the node is open. 
D)  the node is high. 
A)  the node is grounded. 
B)  the node is pulsing. 
C)  the node is open. 
D)  the node is high.

Question 15

The MOS logic circuit fan- out is generally_____ than TTL fan- outs and the power drain is usually____ 	than for TTL.

Accepted Answer

A)  greater, less 
B)  less, less 
C)  less, greater 
D)  greater, greater 
A)  greater, less 
B)  less, less 
C)  less, greater 
D)  greater, greater

Question 16

The term "wired AND" refers to:

Accepted Answer

A)  wiring multiple outputs to an external AND gate to perform the desired AND function. 
B)  wiring multiple outputs to a common ground. 
C)  wiring multiple outputs to a common point. The common tie point performs the AND function. 
D)  wiring multiple outputs to an active LOW input OR gate to perform the AND function. 
A)  wiring multiple outputs to an external AND gate to perform the desired AND function. 
B)  wiring multiple outputs to a common ground. 
C)  wiring multiple outputs to a common point. The common tie point performs the AND function. 
D)  wiring multiple outputs to an active LOW input OR gate to perform the AND function.

Question 17

Which of the following MOSFET families has the advantage of higher speed and much lower power dissipation (as compared to the others)?

Accepted Answer

A)  CMOS 
B)  N- MOS 
C)  MOSFET 
D)  P- MOS 
A)  CMOS 
B)  N- MOS 
C)  MOSFET 
D)  P- MOS

Question 18

The principal advantage of MOS circuits over TTL circuits is their fast operating speed.

Accepted Answer

A) True 
 B)False

Question 19

A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.

Accepted Answer

A) True 
 B)False

Question 20

The______ 	logic family uses both P- and N- channel MOS- FETs in the same circuit to realize several advantages over the P- MOS and N- MOS families.

Accepted Answer

The answer of The______ 	logic family uses both P- and...

Tri- state devices with input and output enable controls simplify interfacing tasks by allowing the user to:

The term "pin compatible" means:

A logic device has the following specifications: V_OL(max)= 0.5 V, V_IL(max)= 0.9 V, V_OH(min)=2.6V,and V_IH(min)=2.1V.Determine the Low-state dc noise margin for the device .

Generally, an increase in load capacitance to a MOS logic output results in:

If not connected to a ground or logic high signal, TTL inputs:

An IC logic gate draws 1.8 mA when its output is HIGH and 3.8 mA when its output is LOW. Assume a 50% duty cycle and calculate the average I_cccurrent drain.

The IC chip parameter that describes the output current generated in the logical "O" state under specified load conditions is:

If a situation calls for a TTL circuit to drive a CMOS circuit, you should:

3.3 V devices should never be subjected to 5.0 V.

The measure of a logic circuit's ability to withstand random noise on its inputs without causing spurious changes in the output voltage is called:

The highest speed version for the Cyclone II chip is the dash ______.

In the high- impedance state, tri- state devices:

Integrated circuits typically dissipate less power than their discrete component counterparts.

If a logic pulser indicates a constant low at a particular node:

The MOS logic circuit fan- out is generally_ than TTL fan- outs and the power drain is usually than for TTL.

The term "wired AND" refers to:

Which of the following MOSFET families has the advantage of higher speed and much lower power dissipation (as compared to the others)?

The principal advantage of MOS circuits over TTL circuits is their fast operating speed.

A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.

The______ logic family uses both P- and N- channel MOS- FETs in the same circuit to realize several advantages over the P- MOS and N- MOS families.

Introductory Concepts

Number Systems and Codes

Describing Logic Circuits

Combinational Logic Circuits

Flip-Flops and Related Devices

Digital Arithmetic: Operations and Circuits

Counters and Registers

MSI Logic Circuits

Digital System Projects Using HDL

Interfacing With the Analog World

Memory Devices

Programmable Logic Device Architectures

Filters

Exam 8: Integrated-Circuit Logic Families

Tri- state devices with input and output enable controls simplify interfacing tasks by allowing the user to:

The term "pin compatible" means:

A logic device has the following specifications: VOL(max) = 0.5 V, VIL(max) = 0.9 V, VOH(min) =2.6V,and VIH(min)=2.1V.Determine the Low-state dc noise margin for the device .

Generally, an increase in load capacitance to a MOS logic output results in:

If not connected to a ground or logic high signal, TTL inputs:

An IC logic gate draws 1.8 mA when its output is HIGH and 3.8 mA when its output is LOW. Assume a 50% duty cycle and calculate the average Icc current drain.

The IC chip parameter that describes the output current generated in the logical "O" state under specified load conditions is:

If a situation calls for a TTL circuit to drive a CMOS circuit, you should:

3.3 V devices should never be subjected to 5.0 V.

The measure of a logic circuit's ability to withstand random noise on its inputs without causing spurious changes in the output voltage is called:

The highest speed version for the Cyclone II chip is the dash ______.

In the high- impedance state, tri- state devices:

Integrated circuits typically dissipate less power than their discrete component counterparts.

If a logic pulser indicates a constant low at a particular node:

The MOS logic circuit fan- out is generally_____ than TTL fan- outs and the power drain is usually____ than for TTL.

The term "wired AND" refers to:

Which of the following MOSFET families has the advantage of higher speed and much lower power dissipation (as compared to the others)?

The principal advantage of MOS circuits over TTL circuits is their fast operating speed.

A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.

The______ logic family uses both P- and N- channel MOS- FETs in the same circuit to realize several advantages over the P- MOS and N- MOS families.

Introductory Concepts

Number Systems and Codes

Describing Logic Circuits

Combinational Logic Circuits

Flip-Flops and Related Devices

Digital Arithmetic: Operations and Circuits

Counters and Registers

MSI Logic Circuits

Digital System Projects Using HDL

Interfacing With the Analog World

Memory Devices

Programmable Logic Device Architectures

Filters

A logic device has the following specifications: V_OL(max)= 0.5 V, V_IL(max)= 0.9 V, V_OH(min)=2.6V,and V_IH(min)=2.1V.Determine the Low-state dc noise margin for the device .

An IC logic gate draws 1.8 mA when its output is HIGH and 3.8 mA when its output is LOW. Assume a 50% duty cycle and calculate the average I_cccurrent drain.

The MOS logic circuit fan- out is generally_ than TTL fan- outs and the power drain is usually than for TTL.